Wireless Communications and Networks



a speed mandates the use of an interleaved flash ADC, which tends to be power hungry
with the power scaling exponentially increasing with bit precision. Although achievable
with today's CMOS technology, such an ADC must be avoided in low-power operations.
One technique to avoid using such a high-speed ADC is to implement the correlator in
the analog domain. One technical challenge associated with the analog implementation
method is the difficulty in obtaining the receiver template waveform and deriving the
precise timing of symbols and received paths. In the digital implementation, a bank of
correlators that are delayed relative to one another by a fraction of the pulse duration can
be applied to correlate with the received digitized signal, and the local peaks corresponding
to the possible received pulses are located. With analog implementation, this is difficult
to achieve because some sort of analog delay units, and novel multipath tracking methods
are needed. Another approach is to represent the samples using fewer bits. One bit (mono-
bit) representation of samples, a traditional approach, finds a new application in UWB in
reducing ADC speed.

1.2.5 Timing Acquisition
Timing acquisition is the first operating stage in any communication system. It is an
especially difficult task in the UWB system mainly owing to limited transmitted power
and a high-resolution multipath. Low transmitted power implies a long search time to
obtain reliable timing, while a received signal with multipath components can result
in a set of `good' signal phases within the search window, making the decision much
more complex. Although timing acquisition is not a new issue in general, in the UWB
community it has received attention recently [1, 14, 15]. Basically, the bulk of the research
has focused on finding efficient search strategies, reducing search space, and examining
sophisticated estimation-based schemes.

1.2.6 Receiver Structures